From b379c910d4009fb72944494c8b18d368b176a19a Mon Sep 17 00:00:00 2001
From: David Carlier <[EMAIL REDACTED]>
Date: Sun, 22 Jan 2023 21:01:22 +0000
Subject: [PATCH] SDL_CPUPauseInstruction RISCV-64 version proposal.
---
include/SDL3/SDL_atomic.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/SDL3/SDL_atomic.h b/include/SDL3/SDL_atomic.h
index 3c7cd7d05739..5e507f66adfd 100644
--- a/include/SDL3/SDL_atomic.h
+++ b/include/SDL3/SDL_atomic.h
@@ -244,6 +244,8 @@ typedef void (*SDL_KernelMemoryBarrierFunc)();
#define SDL_CPUPauseInstruction() __asm__ __volatile__("yield" ::: "memory")
#elif (defined(__powerpc__) || defined(__powerpc64__))
#define SDL_CPUPauseInstruction() __asm__ __volatile__("or 27,27,27");
+#elif (defined(__riscv) && __riscv_xlen == 64)
+ #define SDL_CPUPauseInstruction() __asm__ __volatile__(".insn i 0x0F, 0, x0, x0, 0x010");
#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
#define SDL_CPUPauseInstruction() _mm_pause() /* this is actually "rep nop" and not a SIMD instruction. No inline asm in MSVC x86-64! */
#elif defined(_MSC_VER) && (defined(_M_ARM) || defined(_M_ARM64))