# SDL: SDL\_TriggerBreakppoint for riscv arch (both 32/64) version. (8f858)

**URL:** <https://discourse.libsdl.org/t/sdl-sdl-triggerbreakppoint-for-riscv-arch-both-32-64-version-8f858/45557>\
**Category:** SDL Commits\
**Created:** [August 13, 2023, 8:04pm UTC](https://discourse.libsdl.org/t/sdl-sdl-triggerbreakppoint-for-riscv-arch-both-32-64-version-8f858/45557 "2023-08-13T20:04:02Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![SDLPushPostBot](https://discourse.libsdl.org/user_avatar/discourse.libsdl.org/sdlpushpostbot/32/4370_2.png) [@SDLPushPostBot](https://discourse.libsdl.org/u/SDLPushPostBot)\
**Post date:** [August 13, 2023, 8:04pm UTC](https://discourse.libsdl.org/t/sdl-sdl-triggerbreakppoint-for-riscv-arch-both-32-64-version-8f858/45557/1 "2023-08-13T20:04:02Z")

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> <https://github.com/libsdl-org/SDL/commit/8f858d7908803422a46b673af16ffb20c64eeac4>
>
> \`ebreak\` acts like int3 for x86, giving control of running process to debuggers.…
> (cherry picked from commit 723bcd0a8be4e816f6555b6bbbd5e9c26ab27137)

```diff
From 8f858d7908803422a46b673af16ffb20c64eeac4 Mon Sep 17 00:00:00 2001
From: David CARLIER <[EMAIL REDACTED]>
Date: Sun, 13 Aug 2023 13:54:07 +0100
Subject: [PATCH] SDL_TriggerBreakppoint for riscv arch (both 32/64) version.

`ebreak` acts like int3 for x86, giving control of running process to debuggers.
(cherry picked from commit 723bcd0a8be4e816f6555b6bbbd5e9c26ab27137)
---
 include/SDL_assert.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/SDL_assert.h b/include/SDL_assert.h
index 87d5c1bdb6bb..7ce823ec5433 100644
--- a/include/SDL_assert.h
+++ b/include/SDL_assert.h
@@ -55,6 +55,8 @@ assert can have unique static variables associated with it.
     #define SDL_TriggerBreakpoint() __builtin_debugtrap()
 #elif ( (!defined( __NACL__ )) && ((defined( __GNUC__ ) || defined( __clang__ )) && (defined( __i386__ ) || defined( __x86_64__ ))) )
     #define SDL_TriggerBreakpoint() __asm__  __volatile__ ( "int $3\n\t" )
+#elif (defined( __GNUC__ ) || defined( __clang__ )) && defined(__riscv)
+ #define SDL_TriggerBreakpoint() __asm__  __volatile__ ( "ebreak\n\t" )
 #elif ( defined( __APPLE__ ) && (defined( __arm64__ ) || defined( __aarch64__ )) ) /* this might work on other ARM targets, but this is a known quantity... */
     #define SDL_TriggerBreakpoint() __asm__  __volatile__ ( "brk #22\n\t" )
 #elif defined( __APPLE__ ) && defined( __arm__ )

```