aom: add missing CONFIG_AV1_HIGHBITDEPTH checks (f75b7)

From f75b7c763faaae6f681cff07c22e4e619d78a7a2 Mon Sep 17 00:00:00 2001
From: James Zern <[EMAIL REDACTED]>
Date: Tue, 6 Aug 2024 13:17:07 -0700
Subject: [PATCH] add missing CONFIG_AV1_HIGHBITDEPTH checks

This fixes some -Wmissing-prototypes warnings.

Bug: aomedia:42302428
Change-Id: I5d80f30f984dfb300b2302e9883d2f1dc4f1d190
---
 aom_dsp/x86/aom_convolve_copy_sse2.c        | 2 ++
 aom_dsp/x86/intrapred_avx2.c                | 4 ++++
 aom_dsp/x86/masked_sad_intrin_avx2.c        | 2 ++
 aom_dsp/x86/masked_sad_intrin_ssse3.c       | 2 ++
 aom_dsp/x86/obmc_sad_avx2.c                 | 2 ++
 aom_dsp/x86/obmc_sad_sse4.c                 | 2 ++
 aom_dsp/x86/variance_avx2.c                 | 4 ++++
 aom_dsp/x86/variance_sse2.c                 | 2 ++
 av1/common/x86/av1_convolve_horiz_rs_sse4.c | 2 ++
 av1/common/x86/av1_convolve_scale_sse4.c    | 2 ++
 av1/encoder/x86/pickrst_avx2.c              | 2 +-
 av1/encoder/x86/pickrst_sse4.c              | 2 +-
 12 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/aom_dsp/x86/aom_convolve_copy_sse2.c b/aom_dsp/x86/aom_convolve_copy_sse2.c
index 674a37fa49..c4121705c2 100644
--- a/aom_dsp/x86/aom_convolve_copy_sse2.c
+++ b/aom_dsp/x86/aom_convolve_copy_sse2.c
@@ -143,6 +143,7 @@ void aom_convolve_copy_sse2(const uint8_t *src, ptrdiff_t src_stride,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE void highbd_copy_64(const uint16_t *src, uint16_t *dst) {
   __m128i s[8];
   s[0] = _mm_loadu_si128((__m128i *)(src + 0 * 8));
@@ -311,3 +312,4 @@ void aom_highbd_convolve_copy_sse2(const uint16_t *src, ptrdiff_t src_stride,
     } while (h);
   }
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/aom_dsp/x86/intrapred_avx2.c b/aom_dsp/x86/intrapred_avx2.c
index 4a7b862f32..d9d0a1c377 100644
--- a/aom_dsp/x86/intrapred_avx2.c
+++ b/aom_dsp/x86/intrapred_avx2.c
@@ -66,6 +66,7 @@ static INLINE void row_store_64xh(const __m256i *r, int height, uint8_t *dst,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static DECLARE_ALIGNED(16, uint8_t, HighbdLoadMaskx[8][16]) = {
   { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
   { 0, 1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 },
@@ -314,6 +315,7 @@ static INLINE void highbd_transpose16x16_avx2(__m256i *x, __m256i *d) {
                                        _mm256_extracti128_si256(dd[i], 1), 0);
   }
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
 
 void aom_dc_predictor_32x32_avx2(uint8_t *dst, ptrdiff_t stride,
                                  const uint8_t *above, const uint8_t *left) {
@@ -1040,6 +1042,7 @@ void aom_paeth_predictor_64x16_avx2(uint8_t *dst, ptrdiff_t stride,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 #define PERM4x64(c0, c1, c2, c3) c0 + (c1 << 2) + (c2 << 4) + (c3 << 6)
 #define PERM2x128(c0, c1) c0 + (c1 << 4)
 
@@ -3424,6 +3427,7 @@ void av1_highbd_dr_prediction_z3_avx2(uint16_t *dst, ptrdiff_t stride, int bw,
   }
   return;
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
 
 // Low bit depth functions
 static DECLARE_ALIGNED(32, uint8_t, BaseMask[33][32]) = {
diff --git a/aom_dsp/x86/masked_sad_intrin_avx2.c b/aom_dsp/x86/masked_sad_intrin_avx2.c
index d157d7d625..9bc79d8022 100644
--- a/aom_dsp/x86/masked_sad_intrin_avx2.c
+++ b/aom_dsp/x86/masked_sad_intrin_avx2.c
@@ -196,6 +196,7 @@ MASKSADMXN_AVX2(16, 64)
 MASKSADMXN_AVX2(64, 16)
 #endif  // !CONFIG_REALTIME_ONLY
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE unsigned int highbd_masked_sad8xh_avx2(
     const uint8_t *src8, int src_stride, const uint8_t *a8, int a_stride,
     const uint8_t *b8, int b_stride, const uint8_t *m_ptr, int m_stride,
@@ -387,3 +388,4 @@ HIGHBD_MASKSADMXN_AVX2(32, 8)
 HIGHBD_MASKSADMXN_AVX2(16, 64)
 HIGHBD_MASKSADMXN_AVX2(64, 16)
 #endif  // !CONFIG_REALTIME_ONLY
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/aom_dsp/x86/masked_sad_intrin_ssse3.c b/aom_dsp/x86/masked_sad_intrin_ssse3.c
index ee56d33272..9fa5b58d10 100644
--- a/aom_dsp/x86/masked_sad_intrin_ssse3.c
+++ b/aom_dsp/x86/masked_sad_intrin_ssse3.c
@@ -228,6 +228,7 @@ unsigned int aom_masked_sad4xh_ssse3(const uint8_t *src_ptr, int src_stride,
   return (unsigned int)_mm_cvtsi128_si32(res);
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 // For width a multiple of 8
 static INLINE unsigned int highbd_masked_sad_ssse3(
     const uint8_t *src8, int src_stride, const uint8_t *a8, int a_stride,
@@ -404,3 +405,4 @@ unsigned int aom_highbd_masked_sad4xh_ssse3(const uint8_t *src8, int src_stride,
   int sad = _mm_cvtsi128_si32(res);
   return sad;
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/aom_dsp/x86/obmc_sad_avx2.c b/aom_dsp/x86/obmc_sad_avx2.c
index 471afd28f4..fcedecf5e2 100644
--- a/aom_dsp/x86/obmc_sad_avx2.c
+++ b/aom_dsp/x86/obmc_sad_avx2.c
@@ -148,6 +148,7 @@ OBMCSADWXH(64, 16)
 // High bit-depth
 ////////////////////////////////////////////////////////////////////////////////
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE unsigned int hbd_obmc_sad_w4_avx2(const uint8_t *pre8,
                                                 const int pre_stride,
                                                 const int32_t *wsrc,
@@ -269,3 +270,4 @@ HBD_OBMCSADWXH(8, 32)
 HBD_OBMCSADWXH(32, 8)
 HBD_OBMCSADWXH(16, 64)
 HBD_OBMCSADWXH(64, 16)
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/aom_dsp/x86/obmc_sad_sse4.c b/aom_dsp/x86/obmc_sad_sse4.c
index ba0f1a0b73..bacc8ec72e 100644
--- a/aom_dsp/x86/obmc_sad_sse4.c
+++ b/aom_dsp/x86/obmc_sad_sse4.c
@@ -148,6 +148,7 @@ OBMCSADWXH(64, 16)
 // High bit-depth
 ////////////////////////////////////////////////////////////////////////////////
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static AOM_FORCE_INLINE unsigned int hbd_obmc_sad_w4(const uint8_t *pre8,
                                                      const int pre_stride,
                                                      const int32_t *wsrc,
@@ -267,3 +268,4 @@ HBD_OBMCSADWXH(8, 32)
 HBD_OBMCSADWXH(32, 8)
 HBD_OBMCSADWXH(16, 64)
 HBD_OBMCSADWXH(64, 16)
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/aom_dsp/x86/variance_avx2.c b/aom_dsp/x86/variance_avx2.c
index 06f11f3c9b..b470135d99 100644
--- a/aom_dsp/x86/variance_avx2.c
+++ b/aom_dsp/x86/variance_avx2.c
@@ -240,11 +240,13 @@ static INLINE __m256i mm256_loadu2(const uint8_t *p0, const uint8_t *p1) {
   return _mm256_insertf128_si256(d, _mm_loadu_si128((const __m128i *)p0), 1);
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE __m256i mm256_loadu2_16(const uint16_t *p0, const uint16_t *p1) {
   const __m256i d =
       _mm256_castsi128_si256(_mm_loadu_si128((const __m128i *)p1));
   return _mm256_insertf128_si256(d, _mm_loadu_si128((const __m128i *)p0), 1);
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
 
 static INLINE void comp_mask_pred_line_avx2(const __m256i s0, const __m256i s1,
                                             const __m256i a,
@@ -408,6 +410,7 @@ void aom_comp_mask_pred_avx2(uint8_t *comp_pred, const uint8_t *pred, int width,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE __m256i highbd_comp_mask_pred_line_avx2(const __m256i s0,
                                                       const __m256i s1,
                                                       const __m256i a) {
@@ -517,6 +520,7 @@ void aom_highbd_comp_mask_pred_avx2(uint8_t *comp_pred8, const uint8_t *pred8,
     } while (i < height);
   }
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
 
 static uint64_t mse_4xh_16bit_avx2(uint8_t *dst, int dstride, uint16_t *src,
                                    int sstride, int h) {
diff --git a/aom_dsp/x86/variance_sse2.c b/aom_dsp/x86/variance_sse2.c
index 25143a23d9..25f240abca 100644
--- a/aom_dsp/x86/variance_sse2.c
+++ b/aom_dsp/x86/variance_sse2.c
@@ -403,6 +403,7 @@ unsigned int aom_mse16x16_sse2(const uint8_t *src, int src_stride,
   return *sse;
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static INLINE __m128i highbd_comp_mask_pred_line_sse2(const __m128i s0,
                                                       const __m128i s1,
                                                       const __m128i a) {
@@ -515,6 +516,7 @@ void aom_highbd_comp_mask_pred_sse2(uint8_t *comp_pred8, const uint8_t *pred8,
     } while (i < height);
   }
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
 
 static uint64_t mse_4xh_16bit_sse2(uint8_t *dst, int dstride, uint16_t *src,
                                    int sstride, int h) {
diff --git a/av1/common/x86/av1_convolve_horiz_rs_sse4.c b/av1/common/x86/av1_convolve_horiz_rs_sse4.c
index 4d98a4fb23..f7b0c2281b 100644
--- a/av1/common/x86/av1_convolve_horiz_rs_sse4.c
+++ b/av1/common/x86/av1_convolve_horiz_rs_sse4.c
@@ -126,6 +126,7 @@ void av1_convolve_horiz_rs_sse4_1(const uint8_t *src, int src_stride,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 // Note: If the crop width is not a multiple of 4, then, unlike the C version,
 // this function will overwrite some of the padding on the right hand side of
 // the frame. This padding appears to be trashed anyway, so this should not
@@ -226,3 +227,4 @@ void av1_highbd_convolve_horiz_rs_sse4_1(const uint16_t *src, int src_stride,
     }
   }
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/av1/common/x86/av1_convolve_scale_sse4.c b/av1/common/x86/av1_convolve_scale_sse4.c
index 1f33ccaea8..48627a2f69 100644
--- a/av1/common/x86/av1_convolve_scale_sse4.c
+++ b/av1/common/x86/av1_convolve_scale_sse4.c
@@ -255,6 +255,7 @@ void av1_convolve_2d_scale_sse4_1(const uint8_t *src, int src_stride,
            filter_params_y, conv_params, 8);
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 // A specialised version of hfilter, the horizontal filter for
 // av1_highbd_convolve_2d_scale_sse4_1. This version only supports 8 tap
 // filters.
@@ -496,3 +497,4 @@ void av1_highbd_convolve_2d_scale_sse4_1(
   highbd_vfilter8(tmp, im_h, dst, dst_stride, w, h, subpel_y_qn, y_step_qn,
                   filter_params_y, conv_params, bd);
 }
+#endif  // CONFIG_AV1_HIGHBITDEPTH
diff --git a/av1/encoder/x86/pickrst_avx2.c b/av1/encoder/x86/pickrst_avx2.c
index 1aefc2bac6..1c5439fac0 100644
--- a/av1/encoder/x86/pickrst_avx2.c
+++ b/av1/encoder/x86/pickrst_avx2.c
@@ -1908,6 +1908,7 @@ void av1_calc_proj_params_avx2(const uint8_t *src8, int width, int height,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static AOM_INLINE void calc_proj_params_r0_r1_high_bd_avx2(
     const uint8_t *src8, int width, int height, int src_stride,
     const uint8_t *dat8, int dat_stride, int32_t *flt0, int flt0_stride,
@@ -2131,7 +2132,6 @@ void av1_calc_proj_params_high_bd_avx2(const uint8_t *src8, int width,
   }
 }
 
-#if CONFIG_AV1_HIGHBITDEPTH
 int64_t av1_highbd_pixel_proj_error_avx2(
     const uint8_t *src8, int width, int height, int src_stride,
     const uint8_t *dat8, int dat_stride, int32_t *flt0, int flt0_stride,
diff --git a/av1/encoder/x86/pickrst_sse4.c b/av1/encoder/x86/pickrst_sse4.c
index 2ec8d12ced..f52d803358 100644
--- a/av1/encoder/x86/pickrst_sse4.c
+++ b/av1/encoder/x86/pickrst_sse4.c
@@ -1070,6 +1070,7 @@ void av1_calc_proj_params_sse4_1(const uint8_t *src8, int width, int height,
   }
 }
 
+#if CONFIG_AV1_HIGHBITDEPTH
 static AOM_INLINE void calc_proj_params_r0_r1_high_bd_sse4_1(
     const uint8_t *src8, int width, int height, int src_stride,
     const uint8_t *dat8, int dat_stride, int32_t *flt0, int flt0_stride,
@@ -1281,7 +1282,6 @@ void av1_calc_proj_params_high_bd_sse4_1(const uint8_t *src8, int width,
   }
 }
 
-#if CONFIG_AV1_HIGHBITDEPTH
 int64_t av1_highbd_pixel_proj_error_sse4_1(
     const uint8_t *src8, int width, int height, int src_stride,
     const uint8_t *dat8, int dat_stride, int32_t *flt0, int flt0_stride,