From 83d1d1c053dbd0848c6e34d9098c23ce3738effd Mon Sep 17 00:00:00 2001
From: hsnovel <[EMAIL REDACTED]>
Date: Tue, 6 Aug 2024 10:00:41 -0700
Subject: [PATCH] add failsafe for querying cache line size on linux
---
src/cpuinfo/SDL_cpuinfo.c | 33 +++++++++++++++++++++++++++++----
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/src/cpuinfo/SDL_cpuinfo.c b/src/cpuinfo/SDL_cpuinfo.c
index 80790db9f22bb..734960b2332d2 100644
--- a/src/cpuinfo/SDL_cpuinfo.c
+++ b/src/cpuinfo/SDL_cpuinfo.c
@@ -69,6 +69,10 @@
#endif
#endif
+#if defined (SDL_PLATFORM_FREEBSD)
+#include <sys/param.h>
+#endif
+
#if defined(SDL_PLATFORM_ANDROID) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
#include <cpu-features.h>
#endif
@@ -841,6 +845,7 @@ static const char *SDL_GetCPUName(void)
int SDL_GetCPUCacheLineSize(void)
{
const char *cpuType = SDL_GetCPUType();
+ int cacheline_size = SDL_CACHELINE_SIZE; /* initial guess */
int a, b, c, d;
(void)a;
(void)b;
@@ -848,14 +853,34 @@ int SDL_GetCPUCacheLineSize(void)
(void)d;
if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
cpuid(0x00000001, a, b, c, d);
- return ((b >> 8) & 0xff) * 8;
+ cacheline_size = ((b >> 8) & 0xff) * 8;
} else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
cpuid(0x80000005, a, b, c, d);
- return c & 0xff;
+ cacheline_size = c & 0xff;
} else {
- /* Just make a guess here... */
- return SDL_CACHELINE_SIZE;
+#if defined(HAVE_SYSCONF) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
+ if ((cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)) > 0) {
+ return cacheline_size;
+ } else {
+ cacheline_size = SDL_CACHELINE_SIZE;
+ }
+#endif
+#if defined(SDL_PLATFORM_LINUX)
+ {
+ FILE *f = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
+ if (f) {
+ int size;
+ if (fscanf(f, "%d", &size) == 1) {
+ cacheline_size = size;
+ }
+ fclose(f);
+ }
+ }
+#elif defined(__FREEBSD__) && defined(CACHE_LINE_SIZE)
+ cacheline_size = CACHE_LINE_SIZE;
+#endif
}
+ return cacheline_size;
}
#define SDL_CPUFEATURES_RESET_VALUE 0xFFFFFFFF