From c3b0e62850fe2706f7062966bae80e5230c6a14c Mon Sep 17 00:00:00 2001
From: Cameron Gutman <[EMAIL REDACTED]>
Date: Thu, 23 Apr 2026 18:43:44 -0500
Subject: [PATCH] atomic: Use __atomic_thread_fence() when available
This avoids requiring inline assembly for each architecture.
It also fixes some weakly ordered architectures which lacked
said inline assembly (RISC-V, MIPS, LoongArch, etc) and were
thus disasterously broken.
---
include/SDL_atomic.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/SDL_atomic.h b/include/SDL_atomic.h
index e17309067fe38..064276fefda18 100644
--- a/include/SDL_atomic.h
+++ b/include/SDL_atomic.h
@@ -174,7 +174,10 @@ extern __inline void SDL_CompilerBarrier(void);
extern DECLSPEC void SDLCALL SDL_MemoryBarrierReleaseFunction(void);
extern DECLSPEC void SDLCALL SDL_MemoryBarrierAcquireFunction(void);
-#if defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__))
+#if _SDL_HAS_BUILTIN(__atomic_thread_fence) || (defined(__GNUC__) && (__GNUC__ >= 5))
+#define SDL_MemoryBarrierRelease() __atomic_thread_fence(__ATOMIC_RELEASE)
+#define SDL_MemoryBarrierAcquire() __atomic_thread_fence(__ATOMIC_ACQUIRE)
+#elif defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__))
#define SDL_MemoryBarrierRelease() __asm__ __volatile__ ("lwsync" : : : "memory")
#define SDL_MemoryBarrierAcquire() __asm__ __volatile__ ("lwsync" : : : "memory")
#elif defined(__GNUC__) && defined(__aarch64__)